Ransford Morel Hyman Jr. 
Ph.D
Candidate
University of South Florida
4202 E. Fowler Ave. ENB 118
Tampa, FL 33620
rhyman@cse.usf.edu
I am currently an Ph.D
candidate in Computer Engineering working under Dr. Nagarajan
Ranganathan. My research interests are
Reliability in VLSI Systems. I was
the 2009 president of the IEEE-Computer Society USF Chapter for the Academic
year of 2009.
Research Interests:
- Computer Architecture
- Soft Errors
- Peak Power Optimization
- Reliability
- Design Automation
Education:
- Masters of Computer Engineering from University
of South Florida, Tampa, FL (2010)
- Bachelors of Science Degree in Mathematics from Bethune-Cookman
University, Daytona Beach, FL (2002 - 2006)
Publications:
- Hyman,
R.; Bhattacharya, K.; Ranganathan, N.;, "A
strategy for soft error reduction in multi core designs," Circuits
and Systems, 2009. ISCAS 2009. IEEE International Symposium on , vol.,
no., pp.2217-2220, 24-27 May 2009
- Hyman
Jr., R.; Bhattacharya, K.; Ranganathan, N.; ,
"Redundancy Mining for Soft Error Detection in Multi-core
Processors," Computers, IEEE Transactions on , vol.PP,
no.99, pp.1-1, 0 doi: 10.1109/TC.2010.168
- Mahalingam,V. Ranganathan, N., Hyman Jr.,
R.; “A Variation Tolerant Circuit Design technique using Dynamic
Clock Stretching,” Emerging Technologies, ACM Journal of, September 2011.
(Accepted September 5th, 2011)
- Hyman
Jr., R, Bingel, T., Ranganathan,
N., Vo, D.T.;, “A Clock Control Strategy
for Peak Power Reduction Using Pth
Clustering,” Very Large Scale Integration, IEEE Transactions on,
June 2011. (Submitted and Under Review)
Links: Resume Coursework
CANS group Personal
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"If
there is no struggle, there is no progress" (Frederick Douglass)
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